Senior Engineer/ Engineer – Package Silicon Integration Engineer

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Roles & responsibilities can include but are not limited to: Technology Integration Understand silicon and package technology roadmaps across market segments and identify integration solutions that address business needs. Develop and execute plans to integrate new silicon technologies with new package platforms for memory applications, with a focus on identifying and resolving CPI issues. Guide technology development through various maturity phases, supporting Micron's goals of technology leadership and manufacturing excellence. Virtual Prototyping & Simulation Support Contribute to virtual prototyping and artificial intelligence workflows that evaluate new materials, structures, and integration schemes before committing to physical builds — reducing time-to-learning and build costs. Apply or develop working knowledge of multi-physics simulation (mechanical, thermal, or electrical) to support CPI risk assessment and integration decisions. Use virtual prototyping insights to inform test vehicle scope, helping to down-select build options and focus empirical effort on highest-risk scenarios. Correlate simulation outputs with physical characterization, package build data, and reliability results to improve predictive confidence — with support from dedicated simulation specialists where needed. Characterization & Qualification Define mechanical characterization architectures that efficiently capture CPI behaviors and validate integration assumptions across technology nodes in collaboration with silicon, package, and lab subject matter experts for characterization of critical integration parameters. Plan and execute Design of Experiments (DOEs) informed by both simulation predictions and test vehicle results to efficiently validate integration approaches. Characterize enabling technologies across thermal, mechanical, electrical, and reliability dimensions and document best-known processes (BKMs) and transition validated learnings into manufacturing-ready processes and design rules. Hand-off validated material selections, process guidelines, and design rules to manufacturing teams in a structured and repeatable manner. Design Rule Development Collaborate with silicon and package developers to identify solutions and implement design rules informed by both empirical and simulation-based insights. Contribute to stack-up guidance and layout recommendations that improve reliability and manufacturability. Translate learnings from characterizations and virtual prototypes into actionable design guidelines for silicon and package design teams. Cross-Functional Collaboration Partner with global R&D (Research & Development), wafer fabs, and manufacturing packaging teams to resolve integration challenges and improve yield, quality, and manufacturability. Support root cause analysis efforts by combining physical failure analysis with test vehicle data and available simulation insights. Engage with silicon design, package design, and test teams to align test vehicle objectives and virtual prototyping priorities with program needs. Roadmap Alignment Stay aligned with evolving silicon and package technology roadmaps (e.g., 3DS, HBM, advanced node scaling) to anticipate integration challenges and plan accordingly. Identify gaps in test methodology coverage and virtual prototyping capabilities to support next-generation technology enablement. Mandatory Requirements: Understanding of IC package development with exposure to CPI concepts, test vehicle development, front-end fab processes, or BEOL integration. Ability to define and execute test vehicle strategies that efficiently characterize integration behaviors and accelerate technology maturity. Familia